CAMRAS DSLWP data

This page contains raw IQ data from the Chinese DSLWP satellite observed with the Dwingeloo Telescope.

Satellite Observation Frequency offset (Hz) Observers Notes
DSLWP-B 2018-06-03T02:39:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T02:44:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T02:49:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T02:54:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T02:59:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T03:04:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T03:09:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T03:14:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T03:19:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T03:24:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-03T03:29:45 Cees Bassa and Jan van Muijlwijk USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T05:54:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T05:59:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:04:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:09:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:14:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:19:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:24:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:29:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:34:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:39:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-08T06:44:45 Cees Bassa and Paul Boven USRP B200, internal clock, 2Msps at 436MHz, complex floats
DSLWP-B 2018-06-10 package frames Jan van Muijlwijk, Tammo Jan Dijkema, Wang Cheng, Cees Bassa USRP B210, GPSDO, 40ksps at 435.4MHz and 436.4MHz, complex floats with meta header
DSLWP-B 2018-06-10 package frames from Shahe MingChuan Wei, Shahe telescope USRP B210, onboard GPSDO, 40ksps at 435.4MHz and 436.4MHz, complex floats with meta header
DSLWP-B 2018-07-14T07:05:42 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T07:31:45 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T07:41:24 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T07:49:48 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T08:02:00 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T08:09:45 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T08:11:59 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T08:29:48 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T08:40:18 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-14T07:05:42 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T07:31:45 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T07:41:24 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T07:49:48 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T08:02:00 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T08:09:45 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T08:11:59 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T08:29:48 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-14T08:40:18 Cees Bassa, Tammo Jan Dijkema and Jan van Gils USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-15T08:29:50 Cees Bassa, Tammo Jan Dijkema and Jan van Muijlwijk USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-15T08:50:49 Cees Bassa, Tammo Jan Dijkema and Jan van Muijlwijk USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-15T10:10:46 Cees Bassa, Tammo Jan Dijkema and Jan van Muijlwijk USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-07-15T08:29:50 Cees Bassa, Tammo Jan Dijkema and Jan van Muijlwijk USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-15T08:50:49 Cees Bassa, Tammo Jan Dijkema and Jan van Muijlwijk USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-07-15T10:10:46 Cees Bassa, Tammo Jan Dijkema and Jan van Muijlwijk USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-08-03T23:11:10 Cees Bassa, Tammo Jan Dijkema and Paul Boven USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-08-03T23:11:10 Cees Bassa, Tammo Jan Dijkema and Paul Boven USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-08-12T06:58:02 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-08-12T06:58:02 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-08-12T07:41:24 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-08-12T07:41:24 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-08-12T08:32:25 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-08-12T08:32:25 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-08-14T08:59:11 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-08-14T08:59:11 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 436.4MHz, complex floats
DSLWP-B 2018-08-14T10:00:02 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 435.4MHz, complex floats
DSLWP-B 2018-08-14T10:00:02 Cees Bassa and Paul Boven USRP B200, internal clock, 40ksps at 436.4MHz, complex floats